Datasheet

Figure 18-2. Parallel Programming Timing, Write Sequence
NCMD
RDY
NOE
NVALID
DATA[15:0]
MODE[3:0]
1
2
3
4
5
Table 18-4. Write Handshake
Step Programmer Action Device Action Data I/O
1 Sets MODE and DATA signals Waits for NCMD low Input
2 Clears NCMD signal Latches MODE and DATA Input
3 Waits for RDY low Clears RDY signal Input
4 Releases MODE and DATA signals Executes command and polls NCMD high Input
5 Sets NCMD signal Executes command and polls NCMD high Input
6 Waits for RDY high Sets RDY Input
18.3.4.2 Read Handshaking
For details on the read handshaking sequence, refer to the following figure and table.
Figure 18-3. Parallel Programming T
iming, Read Sequence
NCMD
RDY
NOE
NVALID
DATA[15:0]
MODE[3:0]
1
2
3
4
5
6
7
9
8
ADDR
Adress IN Z
Data OUT
10
11
X IN
12
13
Table 18-5. Read Handshake
Step Programmer Action Device Action DATA I/O
1 Sets MODE and DATA signals Waits for NCMD low Input
2 Clears NCMD signal Latch MODE and DATA Input
3 Waits for RDY low Clears RDY signal Input
SAM E70/S70/V70/V71 Family
Fast Flash Programming Interface (FFPI)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 86