Datasheet

39.6.11 Device Global Interrupt Enable Register
Name: USBHS_DEVIER
Offset: 0x0018
Property: Write-only
This register always reads as zero.
The following configuration values are valid for all listed bit names of this register:
0: No ef
fect.
1: Sets the corresponding bit in USBHS_DEVIMR.
Bit 31 30 29 28 27 26 25 24
DMA_6 DMA_5 DMA_4 DMA_3 DMA_2 DMA_1 DMA_0
Access
Reset
Bit 23 22 21 20 19 18 17 16
PEP_9 PEP_8 PEP_7 PEP_6 PEP_5 PEP_4
Access
Reset
Bit 15 14 13 12 11 10 9 8
PEP_3 PEP_2 PEP_1 PEP_0
Access
Reset
Bit 7 6 5 4 3 2 1 0
UPRSMES EORSMES WAKEUPES EORSTES SOFES MSOFES SUSPES
Access
Reset
Bits 25, 26, 27, 28, 29, 30, 31 – DMA_ DMA Channel x Interrupt Enable
Bits 12, 13, 14, 15, 16, 17, 18, 19, 20, 21 – PEP_ Endpoint x Interrupt Enable
Bit 6 – UPRSMES Upstream Resume Interrupt Enable
Bit 5 – EORSMES End of Resume Interrupt Enable
Bit 4 – W
AKEUPES Wakeup Interrupt Enable
Bit 3 – EORSTES End of Reset Interrupt Enable
Bit 2 – SOFES Start of Frame Interrupt Enable
Bit 1 – MSOFES Micro Start of Frame Interrupt Enable
Bit 0 – SUSPES Suspend Interrupt Enable
SAM E70/S70/V70/V71 Family
USB High-Speed Interface (USBHS)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 825