Datasheet

39.6.8 Device Global Interrupt Set Register
Name: USBHS_DEVIFR
Offset: 0x000C
Property: Write-only
This register always reads as zero.
The following configuration values are valid for all listed bit names of this register:
0: No ef
fect.
1: Sets the corresponding bit in USBHS_DEVISR.
Bit 31 30 29 28 27 26 25 24
DMA_6 DMA_5 DMA_4 DMA_3 DMA_2 DMA_1 DMA_0
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
UPRSMS EORSMS WAKEUPS EORSTS SOFS MSOFS SUSPS
Access
Reset
Bits 25, 26, 27, 28, 29, 30, 31 – DMA_ DMA Channel x Interrupt Set
Bit 6 – UPRSMS Upstream Resume Interrupt Set
Bit 5 – EORSMS End of Resume Interrupt Set
Bit 4 – W
AKEUPS Wakeup Interrupt Set
Bit 3 – EORSTS End of Reset Interrupt Set
Bit 2 – SOFS Start of Frame Interrupt Set
Bit 1 – MSOFS Micro Start of Frame Interrupt Set
Bit 0 – SUSPS Suspend Interrupt Set
SAM E70/S70/V70/V71 Family
USB High-Speed Interface (USBHS)
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2019 Microchip Technology Inc.
Datasheet
DS60001527D-page 822