Datasheet

39.6.7 Device Global Interrupt Clear Register
Name: USBHS_DEVICR
Offset: 0x0008
Property: Write-only
This register always reads as zero.
The following configuration values are valid for all listed bit names of this register:
0: No ef
fect.
1: Clears the corresponding bit in USBHS_DEVISR.
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
UPRSMC EORSMC WAKEUPC EORSTC SOFC MSOFC SUSPC
Access
Reset
Bit 6 – UPRSMC Upstream Resume Interrupt Clear
Bit 5 – EORSMC End of Resume Interrupt Clear
Bit 4 – W
AKEUPC Wakeup Interrupt Clear
Bit 3 – EORSTC End of Reset Interrupt Clear
Bit 2 – SOFC Start of Frame Interrupt Clear
Bit 1 – MSOFC Micro Start of Frame Interrupt Clear
Bit 0 – SUSPC Suspend Interrupt Clear
SAM E70/S70/V70/V71 Family
USB High-Speed Interface (USBHS)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 821