Datasheet

39. USB High-Speed Interface (USBHS)
39.1 Description
The USB High-Speed Interface (USBHS) complies with the Universal Serial Bus (USB) 2.0 specification in all
speeds.
Each pipe/endpoint can be configured in one of several USB transfer types. It can be associated with one, two or
three banks of a DPRAM used to store the current data payload. If two or three banks are used, then one DPRAM
bank is read or written by the CPU or the DMA, while the other is read or written by the USBHS core. This feature is
mandatory for isochronous pipes/endpoints.
The following table describes the hardware configuration of the USB MCU device.
T
able 39-1. Description of USB Pipes/Endpoints
Pipe/Endpoint Mnemonic Max. Number
Banks
DMA High Band
W
idth
Max. Pipe/
Endpoint Size
Type
0 PEP_0 1 N N 64 Control
1 PEP_1 3 Y Y 1024 Isochronous/Bulk/Interrupt/
Control
2 PEP_2 3 Y Y 1024 Isochronous/Bulk/Interrupt/
Control
3 PEP_3 2 Y Y 1024 Isochronous/Bulk/Interrupt/
Control
4 PEP_4 2 Y Y 1024 Isochronous/Bulk/Interrupt/
Control
5 PEP_5 2 Y Y 1024 Isochronous/Bulk/Interrupt/
Control
6 PEP_6 2 Y Y 1024 Isochronous/Bulk/Interrupt/
Control
7 PEP_7 2 Y Y 1024 Isochronous/Bulk/Interrupt/
Control
8 PEP_8 2 N Y 1024 Isochronous/Bulk/Interrupt/
Control
9 PEP_9 2 N Y 1024 Isochronous/Bulk/Interrupt/
Control
39.2 Embedded Characteristics
• Compatible with the USB 2.0 Specification
•
Supports High-Speed (480 Mbps), Full-Speed (12 Mbps) and Low-Speed (1.5 Mbps) Communication
• 10 Pipes/Endpoints
• 4096 bytes of Embedded Dual-Port RAM (DPRAM) for Pipes/Endpoints
• Up to 3 Memory Banks per Pipe/Endpoint (not for Control Pipe/Endpoint)
• Flexible Pipe/Endpoint Configuration and Management with Dedicated DMA Channels
• On-chip UTMI Transceiver including Pull-ups/Pull-downs
SAM E70/S70/V70/V71 Family
USB High-Speed Interface (USBHS)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 750