Datasheet

38.8.102 GMAC Transmit Buffer Queue Base Address Register Priority Queue x
Name: GMAC_TBQBAPQx
Offset: 0x0440 + (x-1)*0x04 [x=1..5]
Reset: 0x00000000
Property: Read/Write
These registers hold the start address of the transmit buffer queues (transmit buffers descriptor lists) for the additional
queues and must be initialized to the address of valid descriptors, even if the priority queues are not used.
Bit 31 30 29 28 27 26 25 24
TXBQBA[29:22]
Access
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
TXBQBA[21:14]
Access
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
TXBQBA[13:6]
Access
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
TXBQBA[5:0]
Access
Reset 0 0 0 0 0 0
Bits 31:2 – TXBQBA[29:0] T
ransmit Buffer Queue Base Address
Contains the address of the start of the transmit queue.
SAM E70/S70/V70/V71 Family
GMAC - Ethernet MAC
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 735