Datasheet

38.8.101 GMAC Interrupt Status Register Priority Queue x
Name: GMAC_ISRPQx
Offset: 0x0400 + (x-1)*0x04 [x=1..5]
Reset: 0x00000000
Property: Read/Write
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
HRESP ROVR
Access
Reset 0 0
Bit 7 6 5 4 3 2 1 0
TCOMP TFC RLEX RXUBR RCOMP
Access
Reset 0 0 0 0 0
Bit 11 – HRESP HRESP Not OK
Bit 10 – ROVR Receive Overrun
Bit 7 – TCOMP T
ransmit Complete
Bit 6 – TFC Transmit Frame Corruption Due to AHB Error
Transmit frame corruption due to AHB error—set if an error occurs whilst midway through reading transmit frame
from the AHB, including HRESP errors and buffers exhausted mid frame.
Bit 5 – RLEX Retry Limit Exceeded or Late Collision
Bit 2 – RXUBR RX Used Bit Read
Bit 1 – RCOMP Receive Complete
SAM E70/S70/V70/V71 Family
GMAC - Ethernet MAC
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 734