Datasheet

38.8.80 GMAC IP Header Checksum Errors Register
Name: GMAC_IHCE
Offset: 0x1A8
Reset: 0x00000000
Property: -
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
HCKER[7:0]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bits 7:0 – HCKER[7:0] IP Header Checksum Errors
This register counts the number of frames discarded due to an incorrect IP header checksum, but are between 64
and 1518 Bytes (1536 Bytes if GMAC_NCFGR.MAXFS=1) and do not have a CRC error
, an alignment error, nor a
symbol error.
SAM E70/S70/V70/V71 Family
GMAC - Ethernet MAC
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 713