Datasheet

38.8.63 GMAC Pause Frames Received Register
Name: GMAC_PFR
Offset: 0x164
Reset: 0x00000000
Property: -
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
PFRX[15:8]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
PFRX[7:0]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bits 15:0 – PFRX[15:0] Pause Frames Received Register
This register counts the number of pause frames received without error
.
SAM E70/S70/V70/V71 Family
GMAC - Ethernet MAC
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 696