Datasheet

38.8.62 GMAC Multicast Frames Received Register
Name:  GMAC_MFR
Offset:  0x160
Reset:  0x00000000
Property:  -
Bit 31 30 29 28 27 26 25 24
MFRX[31:24]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
MFRX[23:16]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
MFRX[15:8]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
MFRX[7:0]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bits 31:0 – MFRX[31:0] Multicast Frames Received without Error
This register counts the number of multicast frames successfully received without error
, excluding pause frames, and
is only incremented if the frame is successfully filtered and copied to memory.
SAM E70/S70/V70/V71 Family
GMAC - Ethernet MAC
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 695