Datasheet

Figure 11-3. Flash Size
2 * 8 Kbytes
1 * 112 Kbytes
7 * 128 Kbytes
2 * 8 Kbytes
1 * 112 Kbytes
3 * 128 Kbytes
2 * 8 Kbytes
1 * 112 Kbytes
15 * 128 Kbytes
Flash 2 Mbytes Flash 1 Mbyte Flash 512 Kbytes
Erasing the memory can be performed:
Chip Erase
By block of 8 Kbytes
By sector of 128 Kbytes
By 512-byte page
Erase memory by page is possible only in an 8 Kbyte sector
EWP and EWPL commands can be only used in 8 Kbyte sectors
The memory has one additional reprogrammable page that can be used as page signature by the user. It is
accessible through specific modes, for erase, write and read operations. Erase pin assertion will not erase the User
Signature page.
11.1.5.2 Enhanced Embedded Flash Controller
Each Enhanced Embedded Flash Controller manages accesses performed by the masters of the system. It enables
reading the Flash and writing the write buffer. It also contains a User Interface, mapped on the APB.
The Enhanced Embedded Flash Controller ensures the interface of the Flash block.
It manages the programming, erasing, locking and unlocking sequences of the Flash using a full set of commands.
One of the commands returns the embedded Flash descriptor definition that informs the system about the Flash
organization, thus making the software generic.
11.1.5.3 Flash Speed
The user must set the number of wait states depending on the system frequency.
For more details, refer to Embedded Flash Characteristics.
11.1.5.4 Lock Regions
Several lock bits are used to protect write and erase operations on lock regions. A lock region is composed of several
consecutive pages, and each lock region has its associated lock bit.
Table 11-2. Flash Lock Bits
Flash Size (Kbytes) Number of Lock Bits Lock Region Size
2048 128 16 Kbytes
SAM E70/S70/V70/V71 Family
Memories
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 57