Datasheet

If the MSB of addresses are different, the SMC performs the access of a new page. In the same way, if the chip
select is dif
ferent from the previous access, a page break occurs. If two sequential accesses are made to the Page
mode memory, but separated by an other internal or external peripheral access, a page break occurs on the second
access because the chip select of the device was deasserted between both accesses.
Figure 35-36. Access to Non-Sequential Data within the Same Page
A [23:3]
A[2], A1, A0
NCS
MCK
NRD
Page address
A1 A3 A7
D[7:0]
NCS_RD_PULSE NRD_PULSE
NRD_PULSE
D1 D3 D7
SAM E70/S70/V70/V71 Family
Static Memory Controller (SMC)
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2019 Microchip Technology Inc.
Datasheet
DS60001527D-page 443