Datasheet

Figure 35-9.  Standard Read Cycle
A[23:0]
NCS
NRD_SETUP NRD_PULSE NRD_HOLD
MCK
NRD
D[7:0]
NCS_RD_SETUP
NCS_RD_PULSE
NCS_RD_HOLD
NRD_CYCLE
35.9.1.1 NRD Waveform
The NRD signal is characterized by a setup timing, a pulse width and a hold timing.
nrd_setup— NRD setup time is defined as the setup of address before the NRD falling edge;
nrd_pulse—NRD pulse length is the time between NRD falling edge and NRD rising edge;
nrd_hold—NRD hold time is defined as the hold time of address after the NRD rising edge.
35.9.1.2 NCS Waveform
The NCS signal can be divided into a setup time, pulse length and hold time:
ncs_rd_setup—NCS setup time is defined as the setup time of address before the NCS falling edge.
ncs_rd_pulse—NCS pulse length is the time between NCS falling edge and NCS rising edge;
ncs_rd_hold—NCS hold time is defined as the hold time of address after the NCS rising edge.
35.9.1.3 Read Cycle
The NRD_CYCLE time is defined as the total duration of the read cycle, i.e., from the time where address is set on
the address bus to the point where address may change. The total read cycle time is defined as:
NRD_CYCLE = NRD_SETUP + NRD_PULSE + NRD_HOLD,
as well as
NRD_CYCLE = NCS_RD_SETUP + NCS_RD_PULSE + NCS_RD_HOLD
All NRD and NCS timings are defined separately for each chip select as an integer number of Master Clock cycles.
The NRD_CYCLE field is common to both the NRD and NCS signals, thus the timing period is of the same duration.
NRD_CYCLE, NRD_SETUP
, and NRD_PULSE implicitly define the NRD_HOLD value as:
NRD_HOLD = NRD_CYCLE - NRD SETUP - NRD PULSE
NRD_CYCLE, NCS_RD_SETUP, and NCS_RD_PULSE implicitly define the NCS_RD_HOLD value as:
NCS_RD_HOLD = NRD_CYCLE - NCS_RD_SETUP - NCS_RD_PULSE
35.9.1.4 Null Delay Setup and Hold
If null setup and hold parameters are programmed for NRD and/or NCS, NRD and NCS remain active continuously in
case of consecutive read cycles in the same memory (see the following figure).
SAM E70/S70/V70/V71 Family
Static Memory Controller (SMC)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 422