Datasheet

...........continued
LQFP Pin QFN Pin
(1
1)
Power Rail I/O Type Primary Alternate PIO Peripheral A PIO Peripheral B PIO Peripheral CDir PIO Peripheral DDir Reset State
Signal Dir Signal Dir Signal Dir Signal Dir Signal Dir Signal Dir Signal, Dir,
PU, PD,
HiZ, ST
27 27 VDDIO GPIO_AD PA11 I/O WKUP7/
PIODC5
(2)
I QCS O PWMC0_P
WMH0
O PWMC1_P
WM L0
O – – PIO, I, PU,
ST
29 29 VDDIO GPIO_AD PA12 I/O PIODC6
(1)
I QIO1 I/O PWMC0_P
WMH1
O PWMC1_P
WM H0
O – – PIO, I, PU,
ST
18 18 VDDIO GPIO_AD PA13 I/O PIODC7
(1)
I QIO0 I/O PWMC0_P
WMH2
O PWMC1_P
WM L1
O – – PIO, I, PU,
ST
19 19 VDDIO GPIO_CLK PA14 I/O WKUP8/
PIODCEN
1
(2)
I QSCK O PWMC0_P
WMH3
O PWMC1_P
WM H1
O – – PIO, I, PU,
ST
12 12 VDDIO GPIO_AD PA21 I/O AFE0_AD1/
PIODCEN2
(
7)
I RXD1 I PCK1 O PWMC1_P
WM FI0
I – – PIO, I, PU,
ST
17 17 VDDIO GPIO_AD PA22 I/O PIODCCLK
(
1)
I RK I/O PWMC0_P
WMEXT
RG1
I NCS2 O – – PIO, I, PU,
ST
23 23 VDDIO GPIO_AD PA24 I/O – – RTS1 O PWMC0_P
WMH1
O A20 O ISI_PCK I PIO, I, PU,
ST
30 30 VDDIO GPIO_AD PA27 I/O – – DTR1 O TIOB2 I/O MCDA3 I/O ISI_D7 I PIO, I, PU,
ST
8 8 VDDIO GPIO PB0 I/O AFE0_AD10
/
RTCOUT0
(
6)
I PWMC0_P
WMH0
O – – RXD0 I TF I/O PIO, I, PU,
ST
7 7 VDDIO GPIO PB1 I/O AFE1_AD0/
RTCOUT1
(
6)
I PWMC0_P
WMH1
O GTSUCOM
P
O TXD0 I/O TK I/O PIO, I, PU,
ST
9 9 VDDIO GPIO PB2 I/O AFE0_AD5
(
4)
I CANTX0 O – – CTS0 I SPI0_NPCS
0
I/O PIO, I, PU,
ST
11 11 VDDIO GPIO_AD PB3 I/O AFE0_AD2/
WKUP
12
(6)
I CANRX0 I PCK2 O RTS0 O ISI_D2 I PIO, I, PU,
ST
46 46 VDDIO GPIO_MLB PB4 I/O TDI
(8)
I TWD1 I/O PWMC0_P
WMH2
O MLBCLK
-
I
-
TXD1 I/O PIO, I, PD,
ST
47 47 VDDIO GPIO_MLB PB5 I/O TDO/
TRACESW
O/
WKUP13
(8)
O TWCK1 O PWMC0_P
WML0
O MLBDAT
-
I/O
-
TD O O, PU
35 35 VDDIO GPIO PB6 I/O SWDIO/TM
S
(8)
I – – – – – – – – PIO,I,ST
39 39 VDDIO GPIO PB7 I/O SWCLK/TC
K
(8)
I – – – – – – – – PIO,I,ST
62 63 VDDIO CLOCK PB8 I/O XOUT
(9)
O – – – – – – – – PIO, HiZ
63 64 VDDIO CLOCK PB9 I/O XIN
(9)
I – – – – – – – – PIO, HiZ
38 38 VDDIO GPIO PB12 I/O ERASE
(8)
I PWMC0_P
WML1
O GTSUCOM
P
O – – PCK0 O PIO, I, PD,
ST
1 2 VDDIO GPIO_AD PD0 I/O DAC1
(11)
I GTXCK I PWMC1_P
WML0
O SPI1_NPCS
1
I/O DCD0 I PIO, I, PU,
ST
57 57 VDDIO GPIO PD1 I/O – – GTXEN O PWMC1_P
WMH0
O SPI1_NPCS
2
I/O DTR0 O PIO, I, PU,
ST
56 56 VDDIO GPIO PD2 I/O – – GTX0 O PWMC1_P
WML1
O SPI1_NPCS
3
I/O DSR0 I PIO, I, PU,
ST
55 55 VDDIO GPIO PD3 I/O – – GTX1 O PWMC1_P
WMH1
O UTXD4 O RI0 I PIO, I, PU,
ST
54 54 VDDIO GPIO_CLK PD4 I/O – – GRXDV I PWMC1_P
WML2
O TRACED0 O – – PIO, I, PU,
ST
53 53 VDDIO GPIO_CLK PD5 I/O – – GRX0 I PWMC1_P
WMH2
O TRACED1 O – – PIO, I, PU,
ST
51 51 VDDIO GPIO_CLK PD6 I/O – – GRX1 I PWMC1_P
WML3
O TRACED2 O – – PIO, I, PU,
ST
50 50 VDDIO GPIO_CLK PD7 I/O – – GRXER I PWMC1_P
WMH3
O TRACED3 O – – PIO, I, PU,
ST
49 49 VDDIO GPIO_CLK PD8 I/O – – GMDC O PWMC0_P
WMFI1
I – – TRACECLK O PIO, I, PU,
ST
SAM E70/S70/V70/V71 Family
Package and Pinout
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 41