Datasheet

6.5 64-lead Package
6.5.1 64-lead QFN Wettable Flanks Package Outline
Figure 6-7. Orientation of the 64-lead QFN Wettable Flanks Package
6.5.2 64-pin LQFP Package Outline
Figure 6-8. Orientation of the 64-pin LQFP Package
33
49
48
32
17
16
1
64
6.6 64-lead Package Pinout
Table 6-3. 64-lead Package Pinout
LQFP Pin QFN Pin
(1
1)
Power Rail I/O Type Primary Alternate PIO Peripheral A PIO Peripheral B PIO Peripheral CDir PIO Peripheral DDir Reset State
Signal Dir Signal Dir Signal Dir Signal Dir Signal Dir Signal Dir Signal, Dir,
PU, PD,
HiZ, ST
40 40 VDDIO GPIO_AD PA3 I/O PIODC0
(1)
I TWD0
(2)
I/O LONCOL1 I PCK2 O – – PIO, I, PU,
ST
34 34 VDDIO GPIO PA4 I/O WKUP3/
PIODC1
(2)
I TWCK0 O TCLK0 I UTXD1 O – – PIO, I, PU,
ST
32 32 VDDIO GPIO_AD PA5 I/O WKUP4/
PIODC2
(2)
I PWMC1_P
WML3
O ISI_D4 I URXD1 I – – PIO, I, PU,
ST
15 15 VDDIO CLOCK PA7 I/O XIN32
(3)
I – – PWMC0_P
WMH3
– – – – – PIO, HiZ
16 16 VDDIO CLOCK PA8 I/O XOUT32
(3)
O PWMC1_P
WMH3
O AFE0_ADT
RG
I – – – – PIO, HiZ
33 33 VDDIO GPIO_AD PA9 I/O WKUP6/
PIODC3
(2)
I URXD0 I ISI_D3 I PWMC0_P
WM FI0
I – – PIO, I, PU,
ST
28 28 VDDIO GPIO_AD PA10 I/O PIODC4
(1)
I UTXD0 O PWMC0_P
WMEXT
RG0
I RD I – – PIO, I, PU,
ST
SAM E70/S70/V70/V71 Family
Package and Pinout
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 40