Datasheet

59. Electrical Characteristics for SAM E70/S70
32.5.13 Programmable Schmitt Trigger
It is possible to configure each input for the Schmitt trigger. By default the Schmitt trigger is active. Disabling the
Schmitt trigger is requested when using the QT
ouch
®
Library.
32.5.14 Parallel Capture Mode
32.5.14.1 Overview
The PIO Controller integrates an interface able to read data from a CMOS digital image sensor, a high-speed parallel
ADC, a DSP synchronous port in Synchronous mode, etc. For better understanding and to ease reading, the
following description uses an example with a CMOS digital image sensor
.
32.5.14.2 Functional Description
The CMOS digital image sensor provides a sensor clock, an 8-bit data synchronous with the sensor clock and two
data enables which are also synchronous with the sensor clock.
Figure 32-8. PIO Controller Connection with CMOS Digital Image Sensor
PIO Controller
Parallel Capture
Mo
de
CMOS Digital
Image Sensor
DMA
Data
Events
PIODCCLK
PIODC[7:0]
PIODCEN1
PIODCEN2
PCLK
DATA[7:0]
VSYNC
HSYNC
Figure 32-9.
PIO Controller
Parallel Capture
Mo
de
CMOS Digital
Image Sensor
PDC
Data
Status
PIODCCLK
PIODC[7:0]
PIODCEN1
PIODCEN2
PCLK
DATA[7:0]
VSYNC
HSYNC
Events
As soon as the Parallel Capture mode is enabled by writing a one to the PCEN bit in PIO_PCMR, the I/O lines
connected to the sensor clock (PIODCCLK), the sensor data (PIODC[7:0]) and the sensor data enable signals
(PIODCEN1 and PIODCEN2) are configured automatically as inputs. T
o know which I/O lines are associated with the
sensor clock, the sensor data and the sensor data enable signals, refer to the I/O multiplexing table(s) in the section
“Package and Pinout”.
Once enabled, the Parallel Capture mode samples the data at rising edge of the sensor clock and resynchronizes it
with the peripheral clock domain.
The size of the data which can be read in PIO_PCRHR can be programmed using the DSIZE field in PIO_PCMR. If
this data size is larger than 8 bits, then the Parallel Capture mode samples several sensor data to form a
concatenated data of size defined by DSIZE. Then this data is stored in PIO_PCRHR and the flag DRDY is set to one
in PIO_PCISR.
SAM E70/S70/V70/V71 Family
Parallel Input/Output Controller (PIO)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 316