Datasheet

Figure 32-2. I/O Line Control Logic
1
0
1
0
1
0
1
0
D Q D Q
DFF
1
0
1
0
11
00
01
10
Programmable
Glitch
or
Debouncing
Filter
PIO_PDSR[0]
PIO_ISR[0]
PIO_IDR[0]
PIO_IMR[0]
PIO_IER[0]
PIO Interrupt
(Up to 32 possible inputs)
PIO_ISR[31]
PIO_IDR[31]
PIO_IMR[31]
PIO_IER[31]
Pad
PIO_PUDR[0]
PIO_PUSR[0]
PIO_PUER[0]
PIO_MDDR[0]
PIO_MDSR[0]
PIO_MDER[0]
PIO_CODR[0]
PIO_ODSR[0]
PIO_SODR[0]
PIO_PDR[0]
PIO_PSR[0]
PIO_PER[0]
PIO_ABCDSR1[0]
PIO_ODR[0]
PIO_OSR[0]
PIO_OER[0]
Peripheral Clock
Resynchronization
Stage
Peripheral A Input
Peripheral D Output Enable
Peripheral A Output Enable
EVENT
DETECTOR
DFF
PIO_IFDR[0]
PIO_IFSR[0]
PIO_IFER[0]
Peripheral Clock
Clock
Divider
PIO_IFSCSR[0]
PIO_IFSCER[0]
PIO_IFSCDR[0]
PIO_SCDR
Slow Clock
Peripheral B Output Enable
Peripheral C Output Enable
11
00
01
10
Peripheral D Output
Peripheral A Output
Peripheral B Output
Peripheral C Output
PIO_ABCDSR2[0]
Peripheral B Input
Peripheral C Input
Peripheral D Input
PIO_PPDDR[0]
PIO_PPDSR[0]
PIO_PPDER[0]
VDD
GND
Integrated
Pull-Down
Resistor
Integrated
Pull-Up
Resistor
div_slck
32.5.1 Pullup and Pulldown Resistor Control
Each I/O line is designed with an embedded pullup resistor and an embedded pulldown resistor. The pullup resistor
can be enabled or disabled by writing to the Pull-Up Enable Register (PIO_PUER) or Pull-Up Disable Register
(PIO_PUDR), respectively
. Writing to these registers results in setting or clearing the corresponding bit in the Pull-Up
Status Register (PIO_PUSR). Reading a one in PIO_PUSR means the pullup is disabled and reading a zero means
the pullup is enabled. The pulldown resistor can be enabled or disabled by writing the Pull-Down Enable Register
(PIO_PPDER) or the Pull-Down Disable Register (PIO_PPDDR), respectively. Writing in these registers results in
setting or clearing the corresponding bit in the Pull-Down Status Register (PIO_PPDSR). Reading a one in
PIO_PPDSR means the pullup is disabled and reading a zero means the pulldown is enabled.
Enabling the pulldown resistor while the pullup resistor is still enabled is not possible. In this case, the write of
PIO_PPDER for the relevant I/O line is discarded. Likewise, enabling the pullup resistor while the pulldown resistor is
still enabled is not possible. In this case, the write of PIO_PUER for the relevant I/O line is discarded.
Control of the pullup resistor is possible regardless of the configuration of the I/O line.
After reset, depending on the I/O, pullup or pulldown can be set.
SAM E70/S70/V70/V71 Family
Parallel Input/Output Controller (PIO)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 310