Datasheet

31.20.19 PMC Fast Startup Polarity Register
Name: PMC_FSPR
Offset: 0x0074
Reset: 0x00000000
Property: Read/Write
This register can only be written if the WPEN bit is cleared in the PMC W
rite Protection Mode Register.
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
FSTP15 FSTP14 FSTP13 FSTP12 FSTP11 FSTP10 FSTP9 FSTP8
Access
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
FSTP7 FSTP6 FSTP5 FSTP4 FSTP3 FSTP2 FSTP1 FSTP0
Access
Reset 0 0 0 0 0 0 0 0
Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 – FSTP Fast Startup Input Polarity x bits
Defines the active polarity of the corresponding wake-up input. If the corresponding wake-up input is enabled and at
the FSTP level, it enables a fast restart signal.
SAM E70/S70/V70/V71 Family
Power Management Controller (PMC)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 287