Datasheet

31.10.2.1 Configuration Procedure
Before configuring SleepWalking for a peripheral, check that the PIDx bit in PMC_PCSR is set. This ensures that the
peripheral clock is enabled.
The steps to enable SleepW
alking for a peripheral are the following:
1. Check that the corresponding PIDx bit in the PMC SleepWalking Activity Status register (PMC_SLPWK_ASR)
is set to ‘0’. This ensures that the peripheral has no activity in progress.
2. Enable SleepWalking for the peripheral by writing a ‘1’ to the corresponding PIDx bit in the PMC_SLPWK_ER.
3. Check that the corresponding PIDx bit in PMC_SLPWK_ASR is set to ‘0’. This ensures that no activity has
started during the enable phase.
4. In the PMC_SLPWK_ASR, if the corresponding PIDx bit is set, SleepWalking must be immediately disabled by
writing a ‘1’ to the PIDx bit in the PMC SleepWalking Disable register (PMC_SLPWK_DR). Wait for the end of
peripheral activity before reinitializing the procedure.
If the corresponding PIDx bit is set to ‘0’, then the peripheral clock is disabled and the system can then be
placed in Wait mode.
Before entering Wait mode, check that the AIP bit in the PMC SleepWalking Activity In Progress Register
(PMC_SLPWK_AIPR) is cleared. This ensures that none of the peripherals is currently active.
Note: When SleepWalking for a peripheral is enabled and the core is running (system not in Wait mode), the
peripheral must not be accessed before a wakeup of the peripheral is performed.
31.10.3 Asynchronous Partial Wakeup in Active Mode
When the system is in Active mode, peripherals enabled for asynchronous partial wakeup have their respective
clocks stopped until the peripherals request a clock. When a peripheral requests the clock, the PMC provides the
clock without processor intervention.
The triggering of the peripheral clock request depends on conditions which can be configured for each peripheral. If
these conditions are met, the peripheral asserts a request to the PMC. The PMC disables the Asynchronous Partial
Wakeup mode of the peripheral and provides the clock to the peripheral until the user instructs the PMC to re-enable
partial wakeup on the peripheral. This is done by setting PMC_SLPWK_ER.PIDx.
If the conditions are not met, the peripheral clears the clock request and the PMC stops the peripheral clock until the
clock request is reasserted by the peripheral.
Note: Configuring Asynchronous Partial Wake-up mode requires the same registers as Sleep-Walking mode.
Figure 31-3. Asynchronous Partial Wake-up in Active Mode
system_clock
peripheral_clock
Peripheral
clock request
Peripheral
wakeup request
Peripheral
SleepWalking status
The wakeup request resets the
SleepWalking status of the peripheral
31.10.3.1 Configuration Procedure
Before configuring the asynchronous partial wakeup function of a peripheral, check that the PIDx bit in PMC_PCSR is
set. This ensures that the peripheral clock is enabled.
The steps to enable the asynchronous partial wakeup function of a peripheral are the following:
1.
Check that the corresponding PIDx bit in the PMC SleepWalking Activity Status register (PMC_SLPWK_ASR)
is set to ‘0’. This ensures that the peripheral has no activity in progress.
2. Enable the asynchronous partial wakeup function of the peripheral by writing a ‘1’ to the corresponding PIDx
bit in the PMC_SLPWK_ER.
SAM E70/S70/V70/V71 Family
Power Management Controller (PMC)
©
2019 Microchip Technology Inc.
Datasheet
DS60001527D-page 254