Datasheet
29.3.1 General Purpose Backup Register x
Name: SYS_GPBRx
Offset: 0x00
Reset: 0
Property: R/W
These registers are reset at first power-up and on each loss of VDDIO.
Bit 31 30 29 28 27 26 25 24
GPBR_VALUE[31:24]
Access
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
GPBR_VALUE[23:16]
Access
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
GPBR_VALUE[15:8]
Access
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
GPBR_VALUE[7:0]
Access
Reset 0 0 0 0 0 0 0 0
Bits 31:0 – GPBR_VALUE[31:0] V
alue of GPBR x
If a Tamper event has been detected, it is not possible to write GPBR_VALUE as long as the LPDBCS0 or LPDBCS1
flag has not been cleared in the Supply Controller Status Register (SUPC_SR).
SAM E70/S70/V70/V71 Family
General Purpose Backup Registers (GPBR)
©
2019 Microchip Technology Inc.
Datasheet
DS60001527D-page 241










