Datasheet

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Signal Name Function Type Active
Level
Voltage
Reference
Comments
PIODC0–PIODC7 Parallel Capture Mode
Data
Input – VDDIO –
PIODCCLK Parallel Capture Mode
Clock
Input – –
PIODCEN1–
PIODCEN2
Parallel Capture Mode
Enable
Input – –
External Bus Interface
D[15:0] Data Bus I/O – – –
A[23:0] Address Bus Output – – –
NWAIT External Wait Signal Input Low – –
Static Memory Controller - SMC
NCS0–NCS3 Chip Select Lines Output Low – –
NRD Read Signal Output Low – –
NWE Write Enable Output Low – –
NWR0–NWR1 Write Signal Output Low – –
NBS0–NBS1 Byte Mask Signal Output Low – Used also for
SDRAMC
NAND Flash Logic
NANDOE NAND Flash Output
Enable
Output Low – –
NANDWE NAND Flash Write Enable Output Low – –
SDR-SDRAM Controller Logic
SDCK SDRAM Clock Output – – –
SDCKE SDRAM Clock Enable Output – – –
SDCS SDRAM Controller Chip
Select
Output – – –
BA0–BA1 Bank Select Output – – –
SDWE SDRAM Write Enable Output – – –
RAS–CAS Row and Column Signal Output – – –
SDA10 SDRAM Address 10 Line Output – – –
High Speed Multimedia Card Interface (HSMCI)
MCCK Multimedia Card Clock O – – –
MCCDA Multimedia Card Slot A
Command
I/O – – –
MCDA0–MCDA3 Multimedia Card Slot A
Data
I/O – – –
Universal Synchronous Asynchronous Receiver Transmitter (USART(x=[0:2]))
SAM E70/S70/V70/V71 Family
Signal Description
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 23