Datasheet

27.6.9 RTC Interrupt Enable Register
Name: RTC_IER
Offset: 0x20
Reset: –
Property: Write-only
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
TDERREN CALEN TIMEN SECEN ALREN ACKEN
Access
W W W W W W
Reset – – – – – –
Bit 5 – TDERREN T
ime and/or Date Error Interrupt Enable
Value Description
0
No effect.
1
The time and date error interrupt is enabled.
Bit 4 – CALEN Calendar Event Interrupt Enable
Value Description
0
No effect.
1
The selected calendar event interrupt is enabled.
Bit 3 – TIMEN T
ime Event Interrupt Enable
Value Description
0
No effect.
1
The selected time event interrupt is enabled.
Bit 2 – SECEN Second Event Interrupt Enable
Value Description
0
No effect.
1
The second periodic interrupt is enabled.
Bit 1 – ALREN Alarm Interrupt Enable
Value Description
0
No effect.
1
The alarm interrupt is enabled.
Bit 0 – ACKEN Acknowledge Update Interrupt Enable
Value Description
0
No effect.
1
The acknowledge for update interrupt is enabled.
SAM E70/S70/V70/V71 Family
Real-time Clock (RTC)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 226