Datasheet

27.6.6 RTC Calendar Alarm Register
Name: RTC_CALALR
Offset: 0x14
Reset: 0x01010000
Property: Read/Write
This register can only be written if the WPEN bit is cleared in the System Controller Write Protection Mode Register
(SYSC_WPMR).
T
o change one of the DATE, MONTH fields, it is recommended to disable the field before changing the value and
then re-enable it after the change has been made. This requires up to three accesses to the RTC_CALALR. The first
access clears the enable corresponding to the field to change (DATEEN, MTHEN). If the field is already cleared, this
access is not required. The second access performs the change of the value (DATE, MONTH). The third access is
required to re-enable the field by writing 1 in DATEEN, MTHEN fields.
Bit 31 30 29 28 27 26 25 24
DATEEN DATE[5:0]
Access
R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 1
Bit 23 22 21 20 19 18 17 16
MTHEN MONTH[4:0]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 1
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
Access
Reset
Bit 31 – DATEEN Date Alarm Enable
Value Description
0
The date-matching alarm is disabled.
1
The date-matching alarm is enabled.
Bits 29:24 – DATE[5:0] Date Alarm
This field is the alarm field corresponding to the BCD-coded date counter
.
Bit 23 – MTHEN Month Alarm Enable
Value Description
0
The month-matching alarm is disabled.
1
The month-matching alarm is enabled.
Bits 20:16 – MONTH[4:0] Month Alarm
This field is the alarm field corresponding to the BCD-coded month counter
.
SAM E70/S70/V70/V71 Family
Real-time Clock (RTC)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 222