Datasheet
...........continued
Signal Name Function Type Active
Level
Voltage
Reference
Comments
SWCLK/TCK Serial Wire Clock/Test
Clock (Boundary scan
mode only)
Input – VDDIO –
TDI Test Data In (Boundary
scan mode only)
Input – –
TDO/TRACESWO Test Data Out (Boundary
scan mode only)
Output – –
SWDIO/TMS Serial Wire Input/Output /
T
est Mode Select
(Boundary scan mode
only)
I/O / Input – –
JTAGSEL JTAG Selection Input High –
Trace Debug Port
TRACECLK Trace Clock Output – VDDIO PCK3 is used for
ETM
TRACED0–
TRACED3
Trace Data Output – –
Flash Memory
ERASE Flash and NVM
Configuration Bits Erase
Command
Input High VDDIO –
Reset/Test
NRST Synchronous
Microcontroller Reset
I/O Low VDDIO –
TST Test Select Input – –
Universal Asynchronous Receiver Transceiver - UART(x=[0:4])
URXDx UART Receive Data Input – – PCK4 can be used
to generate the baud
rate
UTXDx UART Transmit Data Output – –
PIO Controller - PIOA - PIOB - PIOC - PIOD - PIOE
PA0–PA31 Parallel IO Controller A I/O – VDDIO –
PB0–PB9, PB12–
PB13
Parallel IO Controller B I/O – –
PC0– PC31 Parallel IO Controller C I/O – –
PD0–PD31 Parallel IO Controller D I/O – – –
PE0–PE5 Parallel IO Controller E I/O – – –
PIO Controller - Parallel Capture Mode
SAM E70/S70/V70/V71 Family
Signal Description
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 22










