Datasheet

Note: T
o change one of the SEC, MIN, HOUR, DATE, MONTH fields, it is recommended to disable the field before
changing the value and then re-enable it after the change has been made. This requires up to three accesses to the
RTC_TIMALR or RTC_CALALR. The first access clears the enable corresponding to the field to change (SECEN,
MINEN, HOUREN, DATEEN, MTHEN). If the field is already cleared, this access is not required. The second access
performs the change of the value (SEC, MIN, HOUR, DATE, MONTH). The third access is required to re-enable the
field by writing 1 in SECEN, MINEN, HOUREn, DATEEN, MTHEN fields.
27.5.4 Error Checking when Programming
Verification on user interface data is performed when accessing the century, year, month, date, day, hours, minutes,
seconds and alarms. A check is performed on illegal BCD entries such as illegal date of the month with regard to the
year and century configured.
If one of the time fields is not correct, the data is not loaded into the register/counter and a flag is set in the validity
register
. The user can not reset this flag. It is reset as soon as an acceptable value is programmed. This avoids any
further side effects in the hardware. The same procedure is followed for the alarm.
The following checks are performed:
1. Century (check if it is in range 19–20 or 13–14 in Persian mode)
2. Year (BCD entry check)
3. Date (check range 01–31)
4. Month (check if it is in BCD range 01–12, check validity regarding “date”)
5. Day (check range 1–7)
6. Hour (BCD checks: in 24-hour mode, check range 00–23 and check that AM/PM flag is not set if RTC is set in
24-hour mode; in 12-hour mode check range 01–12)
7. Minute (check BCD and range 00–59)
8. Second (check BCD and range 00–59)
Note: If the 12-hour mode is selected by means of the RTC Mode Register (RTC_MR), a 12-hour value can be
programmed and the returned value on RTC_TIMR will be the corresponding 24-hour value. The entry control checks
the value of the AM/PM indicator (bit 22 of RTC_TIMR) to determine the range to be checked.
27.5.5 RTC Internal Free Running Counter Error Checking
To improve the reliability and security of the RTC, a permanent check is performed on the internal free running
counters to report non-BCD or invalid date/time values.
An error is reported by TDERR bit in the status register (R
TC_SR) if an incorrect value has been detected. The flag
can be cleared by setting the TDERRCLR bit in the Status Clear Command Register (RTC_SCCR).
The TDERR error flag will be set again if the source of the error has not been cleared before clearing the TDERR
flag. The clearing of the source of such error can be done by reprogramming a correct value on RTC_CALR and/or
RTC_TIMR.
The RTC internal free running counters may automatically clear the source of TDERR due to their roll-over (i.e.,
every 10 seconds for SECONDS[3:0] field in RTC_TIMR). In this case the TDERR is held high until a clear command
is asserted by TDERRCLR bit in RTC_SCCR.
27.5.6 Updating Time/Calendar
27.5.6.1 Description
The update of the time/calendar must be synchronized on a second periodic event by either polling the RTC_SR.SEC
status bit or by enabling the SECEN interrupt in the R
TC_IER register.
Once the second event occurs, the user must stop the RTC by setting the corresponding field in the Control Register
(RTC_CR). Bit UPDTIM must be set to update time fields (hour, minute, second) and bit UPDCAL must be set to
update calendar fields (century, year, month, date, day).
The ACKUPD bit must then be read to 1 by either polling the RTC_SR or by enabling the ACKUPD interrupt in the
RTC_IER. Once ACKUPD is read to 1, it is mandatory to clear this flag by writing the corresponding bit in the
RTC_SCCR, after which the user can write to the Time Register, the Calendar Register, or both.
Once the update is finished, the user must write UPDTIM and/or UPDCAL to 0 in the RTC_CR.
SAM E70/S70/V70/V71 Family
Real-time Clock (RTC)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 205