Datasheet

...........continued
Date Changes
Section 7. “Input/Output Lines”
Section 7.1 “General-Purpose I/O Lines”: changed ODT to R
SERIAL
in text and figure.
Section 7.2.2 “Embedded T
race Module (ETM) Pins”; removed TRACECTL
Section 7.5 “ERASE Pin”: added details on in-situ reprogrammability.
Section 10. “Memories”
Table 10-1 “TCM Configurations in Kbytes“: corrected column GPNVM Bit [8:7] by inverting values (0
first, 3 last).
Table 10-4 “General-purpose Non volatile Memory Bits“: GPNVM bit 1: inverted 0 and 1 values.
GPNVM bit 7–8: inverted all values for TCM configuration and added Note.
Section 10.1.1 “Internal SRAM”: updated section.
Section 10.1.2 “Tightly Coupled Memory (TCM) Interface”: added detail on enable/disable of ITCM/
DTCM.
Section 10.1.4 “Backup SRAM”: updated SRAM address. Removed detail on read/write accesses.
Section 10.1.5 “Flash Memories”: added details on the attribute definitions for programming operations
vs. fetch/read operations.
Section 10.1.5.9 “Fast Flash Programming Interface”: removed ‘serial JTAG interface’.
Section 11. “Event System”
Table 11-1 “ Event Mapping List“: in row “Audio clock recovery from Ethernet’ changed the text in
Description column.
Section 13. “Peripherals”
Table 13-1 “Peripheral Identifiers“: modfied content of column ‘Description’ for clarity.
Section 13.2 “Peripheral Signal Multiplexing on I/O Lines”: corrected PIOC to PIOD for 100-pin version.
Moved Section 13.3 “Peripheral Mapping to DMA” to Section 35.3 “DMA Controller Peripheral
Connections”.
24-Feb-15 Section 15. “Debug and Test Features”
Section 15.1 “Description”: removed references to JTAG Debug Port and JTAG-DP.
Updated Figure 15-1 “Debug and Test Block Diagram”: added Cortex-M7, ETM and PCK3 blocks and
trace pins. Renamed block ‘SWJ-DP’ to ‘SW-DP’.
Table 15-1 “Debug and Test Signal List”: removed TRACECTL.
Updated Figure 15-4 “Debug Architecture”. added ETM and Trace Port blocks. Removed TPIU.
Section 15.6.5 “Serial Wire Debug Port (SW-DP) Pins”: removed all references to JTAG Debug Port
and JTAG-DP.
Section 15.6.6 “Embedded Trace Module (ETM) Pins”: removed TRACECTL from bullet points.
Updated Section 15.6.7 “Flash Patch Breakpoint (FPB)” .
Section 15.6.9.2 “Asynchronous Mode”: removed reference to JTAG Debug Port and JTAG debug
mode.
Section 16. “SAM-BA Boot Program”
Section 16.6.4 “In Application Programming (IAP) Feature”: replaced software code example.
SAM E70/S70/V70/V71 Family
Revision History
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1968