Datasheet
...........continued
Date Changes
Section 52.7.2 ”AFEC Mode Register”: updated TRACKTIM description.
Section 53. ”Digital-to-Analog Converter Controller (DACC)”
T
able 53-1 “DACC Signal Description” : corrected pin names to VREFP and VREFN (were ADVREFP
and ADVREFN).
Section 54. ”Analog Comparator Controller (ACC)”
Table 54-1 “ACC Signal Description” : modified Description for DAC0, DAC1 signals.
Section 54.7.7 ”ACC Analog Control Register”: updated HYST definition.
Section 57. ”Advanced Encryption Standard (AES)”
Section 57.2 ”Embedded Characteristics”: replaced “12/14/16 Clock Cycles Encryption/Decryption
Processing Time...” with “10/12/14 Clock Cycles Encryption/Decryption Inherent Processing Time...”.
Section 58. ”Electrical Characteristics”
Table 58-3 “DC Characteristics” : removed Note 2 on current injection.
Table 58-4 “DC Characteristics” : voltage input level defined for the RST and TEST I/O types. Updated
max values for IIL and IIH.
Updated Table 58-15 “Typical Current Consumption in Wait Mode” .
Table 58-30 “VREFP Electrical Characteristics” : updated V
VREFP
parameter values.
Added new Table 58-34 “AFE INL and DNL, fAFE Clock =<20 MHz max, IBCTL=10” and Table 58-35
“AFE INL and DNL, fAFE Clock >20 MHz to 40 MHz, IBCTL=11” .
Inserted new Table 58-36 “AFE Offset and Gain Error, VVREFP = 1.7V to 3.3V” .
Updated Table 58-40 “DAC Static Performances (1)” .
Updated Table 58-46 “Static Performance Characteristics”
Added Section 58.13.1.10: “USART in Asynchronous Mode”.
Section 62. ”Ordering Information”
Added Note
(2)
on availability.
Section 63. ”Errata”
Added:
- Section 63.1.16 ”Universal Synchronous Asynchronous Receiver Transmitter (USART)”: “Bad frame
detection issue”
- Section 63.2.4 ”ARM Cortex-M7”: “All issues related to the ARM r1p1 core are described on the ARM
site”
- Section 63.2.6 ”Inter-IC Sound Controller (I2SC)”: “I2SC first sent data corrupted”
- Section 63.2.12 ”Universal Synchronous Asynchronous Receiver Transmitter (USART)”: “Bad frame
detection issue”
Deleted:
- Section 63.1.1 ”AFE Controller (AFEC)”: “AFE max sampling frequency is 1.74 Msps”
- Section 63.2.1 ”AFE Controller (AFEC)”: “AFE max sampling frequency is 1.74 Msps”
End
SAM E70/S70/V70/V71 Family
Revision History
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1950