Datasheet

26. Reset Controller (RSTC)
26.1 Description
The Reset Controller (RSTC), driven by Power-On Reset (POR) cells, software, external reset pin and peripheral
events, handles all the resets of the system without any external components. It reports which reset occurred last.
The RSTC also drives simultaneously the external reset and the peripheral and processor resets.
26.2 Embedded Characteristics
• Driven by embedded POR, software, external reset pin and peripheral events
•
Management of all system resets, including:
– External devices through the NRST pin
– Processor
– Peripheral set
• Reset source status:
– Status of the last reset
– Either VDDCORE and VDDIO POR, Software Reset, User Reset, Watchdog Reset
• External reset signal control and shaping
26.3 Block Diagram
Figure 26-1. Reset Controller Block Diagram
NRST Pin
wd_fault
SLCK
Reset
State
Manager
Reset Controller
NRST
Manager
exter_nreset
nrst_out
user_reset
From
watchdog
Processor and
peripherals
reset line
RSTC
interrupt line
POR
Backup
Backup area reset
SUPC
VDDCORE reset
SM
Backup
POR
VDDCORE
BOD
VDDCORE
SAM E70/S70/V70/V71 Family
Reset Controller (RSTC)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 192