Datasheet

Figure 59-25. USART SPI Slave Mode (Mode 1 or 2)
SCK
MISO
MOSI
SPI
6
SPI
7
SPI
8
NSS
SPI
12
SPI
13
• The MOSI line drives the input pin RXD
• The MISO line is driven by the output pin TXD
• The SCK line drives the input pin SCK
• The NSS line drives the input pin CTS
Figure 59-26. USART SPI Slave Mode (Mode 0 or 3)
SCK
MISO
MOSI
SPI
9
SPI
10
SPI
11
NSS
SPI
14
SPI
15
59.13.1.11.1 USART SPI Timings
Timings are given in the following domains:
•
3.3V domain: VDDIO from 2.85V to 3.6V, maximum external capacitor = 40 pF
Table 59-61. USART SPI Timings
Symbol Parameter Conditions Min Max Unit
Master Mode
SPI
0
SCK Period
1.7V domain
3.3V domain
MCK/6
MCK/6
–
–
ns
SPI
1
Input Data Setup Time
1.7V domain
3.3V domain
2.8
2.5
–
–
ns
SAM E70/S70/V70/V71 Family
Electrical Characteristics for SAM E70/S70
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1900