Datasheet

Output duty cycle (40%-60%)
Minimum output swing: 100 mV to V
DDIO
- 100 mV
Addition of rising and falling time inferior to 75% of the period
Table 58-54. I/O Characteristics
Symbol Parameter Conditions Min. Max. Unit
Load V
DDIO
Drive
Level
FreqMax1 Pin Group 1
(1)
Maximum output frequency 10 pF 3.0V Low 65 MHz
High 115
25 pF Low 28
High 55
PulseminH
1
Pin Group 1
(1)
High Level Pulse Width 10 pF 3.0V High 6.1 9.2 ns
PulseminL
1
Pin Group 1
(1)
Low Level Pulse Width 10 pF 3.0V High 6.1 9.2 ns
FreqMax2 Pin Group 2
(2)
Maximum output frequency 10 pF 3.0V High 125 MHz
Low 100
PulseminH
2
Pin Group 2
(2)
High Level Pulse Width 10 pF 3.0V High 3.4 4.1 ns
PulseminL
2
Pin Group 2
(2)
Low Level Pulse Width 10 pF 3.0V High 3.4 4.1 ns
FreqMax3 Pin Group 3
(3)
Maximum output frequency 30 pF 3.0V High 75 MHz
Low 50
PulseminH
3
Pin Group 3
(3)
High Level Pulse Width 30 pF 3.0V High 6.0 7.3 ns
PulseminL
3
Pin Group 3
(3)
Low Level Pulse Width 30 pF High 6.0 7.3 ns
FreqMax4 Pin Group 4
(4)
Maximum output frequency 40 pF 3.0V 51 MHz
PulseminH
4
Pin Group 4
(4)
High Level Pulse Width 40 pF 3.0V 7.8 11.2 ns
PulseminL
4
Pin Group 4
(4)
Low Level Pulse Width 40 pF 3.0V 7.8 11.2 ns
Note: 
1.
Pin Group 1 = GPIO, CLOCK
2. Pin Group 2 = GPIO_CLK
3. Pin Group 3 = GPIO_AD
4. Pin Group 4 = GPIO_MLB
58.13.1.4 MediaLB Characteristics
The system has been constrained to achieve the timings in 256×Fs and 512×Fs in compliance with the MediaLB
(MLB) specification.
Note: 1024×Fs timings are achieved under STH conditions only.
SAM E70/S70/V70/V71 Family
Electrical Characteristics for SAM ...
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1846