Datasheet

57.5.6 AES Interrupt Status Register
Name: AES_ISR
Offset: 0x1C
Reset: 0x00000000
Property: Read-only
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
TAGRDY
Access
R
Reset 0
Bit 15 14 13 12 11 10 9 8
URAT[3:0] URAD
Access
R R R R R
Reset 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
DATRDY
Access
R
Reset 0
Bit 16 – TAGRDY GCM T
ag Ready
Value Description
0
GCM Tag is not valid.
1
GCM Tag generation is complete (cleared by reading GCM Tag, starting another processing or when
writing a new key).
Bits 15:12 – URAT[3:0] Unspecified Register Access (cleared by writing SWRST in AES_CR)
Only the last Unspecified Register Access T
ype is available through the URAT field.
Value Name Description
0
IDR_WR_PROCESSING Input Data register written during the data processing when SMOD = 2
mode.
1
ODR_RD_PROCESSING Output Data register read during the data processing.
2
MR_WR_PROCESSING Mode register written during the data processing.
3
ODR_RD_SUBKGEN Output Data register read during the sub-keys generation.
4
MR_WR_SUBKGEN Mode register written during the sub-keys generation.
5
WOR_RD_ACCESS Write-only register read access.
Bit 8 – URAD Unspecified Register Access Detection Status (cleared by writing SWRST in AES_CR)
Value Description
0
No unspecified register access has been detected since the last SWRST.
1
At least one unspecified register access has been detected since the last SWRST.
Bit 0 – DATRDY Data Ready (cleared by setting bit ST
ART or bit SWRST in AES_CR or by reading AES_ODATARx)
Value Description
0
Output data not valid.
1
Encryption or decryption process is completed.
Note: If AES_MR.LOD = 1: In Manual and Auto mode, the DA
TRDY flag can also be cleared by writing at least one
AES_IDATARx.
SAM E70/S70/V70/V71 Family
Advanced Encryption Standard (AES)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1807