Datasheet

57.5.5 AES Interrupt Mask Register
Name: AES_IMR
Offset: 0x18
Reset: 0x00000000
Property: Read-only
The following configuration values are valid for all listed bit names of this register:
0: The corresponding interrupt is not enabled.
1: The corresponding interrupt is enabled.
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
TAGRDY
Access
R
Reset 0
Bit 15 14 13 12 11 10 9 8
URAD
Access
R
Reset 0
Bit 7 6 5 4 3 2 1 0
DATRDY
Access
R
Reset 0
Bit 16 – TAGRDY GCM T
ag Ready Interrupt Mask
Bit 8 – URAD Unspecified Register Access Detection Interrupt Mask
Bit 0 – DATRDY Data Ready Interrupt Mask
SAM E70/S70/V70/V71 Family
Advanced Encryption Standard (AES)
©
2019 Microchip Technology Inc.
Datasheet
DS60001527D-page 1806