Datasheet

The end of the encryption/decryption is indicated by the end of DMA transfer associated to AES_ODATARx (see the
figure below). T
wo DMA channels are required: one for writing message blocks to AES_IDATARx and one to obtain
the result from AES_ODATARx.
Figure 57-3. DMA Transfer with AES_MR.LOD = 0
Enable DMA Channels associated to AES_IDATARx and AES_ODATARx
Multiple Encryption or Decryption Processes
DMA Buffer transfer
complete flag
/channel n
DMA Buffer transfer
complete flag
/channel m
Message fully processed
(cipher or decipher) last
block can be read
Write accesses into AES_IDATARx
Read accesses into AES_ODATARx
57.4.3.2.2 If AES_MR.LOD = 1
This mode is optimized to process AES CBC-MAC operating mode.
The user must first wait for the DMA buffer transfer complete flag, then for the flag DATRDY to rise to ensure that the
encryption/decryption is completed (see the figure below).
In this case, no receive buffers are required.
The output data are only available on AES_ODATARx.
Figure 57-4. DMA Transfer with AES_MR.LOD = 1
DATRDY
Enable DMA Channels associated with AES_IDATARx and AES_ODATARx registers
Multiple Encryption or Decryption Processes
DMA status flag for
end of buffer transfer
Message fully processed
(cipher or decipher)
MAC result can be read
Write accesses into AES_IDATARx
Message fully transferred
The table below summarizes the different cases.
T
able 57-1. Last Output Data Mode Behavior versus Start Modes
Sequence Manual and Auto Modes DMA Transfer
AES_MR.LOD = 0 AES_MR.LOD = 1 AES_MR.LOD = 0 AES_MR.LOD = 1
DATRDY Flag
Clearing
Condition
(1)
At least one
AES_ODA
TAR must
be read
At least one
AES_IDATAR must
be written
Not used Managed by the DMA
End of
Encryption/
Decryption
Notification
DATRDY DATRDY 2 DMA Buffer transfer
complete flags (channel
m and channel n)
DMA buffer transfer
complete flag, then
AES DATRDY flag
Encrypted/
Decrypted Data
Result Location
In AES_ODATARx In AES_ODATARx At the address specified
in the Channel Buffer
Transfer Descriptor
In AES_ODATARx
SAM E70/S70/V70/V71 Family
Advanced Encryption Standard (AES)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1789