Datasheet

53.6.4.5 Interpolation Mode
The DACC integrates interpolation filters that allow OSR of 2×, 4×, 8×, 16× or 32×. This mode can be used only if
T
rigger mode is enabled and value in the field OSRx is not ‘0’. The OSR of the interpolator is configured in the OSRx
field in the DACC Trigger Register (DACC_TRIGR).
The data is sampled once every OSR trigger event and then recomputed at the trigger sample rate using a third-
order SINC filter. This reduces the number of accesses to the DACC and increases the signal-to-noise ratio (SNR) of
the converted output signal.
The figures below show the spectral mask of the SINC filter depending on the selected OSR. f
s
is the sampling
frequency of the input signal which corresponds to the trigger frequency divided by OSR.
Figure 53-5. Interpolator Spectral Mask for OSR = 2
0 0.125*f
s
0.25*f
s
0.375*f
s
0.5*f
s
0.625*f
s
0.75*f
s
0.875*f
s
1*f
s
-120
-96
-72
-48
-24
0
Frequency (Hz), overall mask
Gain (dB), overall mask
3rd order SINC filter overall mask for OSR = 2
0 f
s
/16 f
s
/8 3*f
s
/16 f
s
/4 5*f
s
/16 3*f
s
/8 7*f
s
/16 f
s
/2
-12
-9.6
-7.2
-4.8
-2.4
0
Frequency (Hz), 0–f
s
/2 mask
Gain (dB), 0–f
s
/2 mask
3rd order SINC filter 0–f
s
/2 mask for OSR = 2
Figure 53-6. Interpolator Spectral Mask for OSR = 4
0 0.25*f
s
0.5*f
s
0.75*f
s
1*f
s
1.25*f
s
1.5*f
s
1.75*f
s
2*f
s
-120
-96
-72
-48
-24
0
Frequency (Hz), overall mask
Gain (dB), overall mask
3rd order SINC filter overall mask for OSR = 4
0 f
s
/16 f
s
/8 3*f
s
/16 f
s
/4 5*f
s
/16 3*f
s
/8 7*f
s
/16 f
s
/2
-12
-9.6
-7.2
-4.8
-2.4
0
Frequency (Hz), 0–f
s
/2 mask
Gain (dB), 0–f
s
/2 mask
3rd order SINC filter 0–f
s
/2 mask for OSR = 4
SAM E70/S70/V70/V71 Family
Digital-to-Analog Converter Controller (DACC)
©
2019 Microchip Technology Inc.
Datasheet
DS60001527D-page 1710