Datasheet

52.7.28 AFEC Write Protection Mode Register
Name: AFEC_WPMR
Offset: 0xE4
Reset: 0x00000000
Property: Read/Write
Bit 31 30 29 28 27 26 25 24
WPKEY[23:16]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
WPKEY[15:8]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
WPKEY[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
WPEN
Access
R/W
Reset 0
Bits 31:8 – WPKEY[23:0] W
rite Protect KEY
Value Name Description
0x414443
PASSWD Writing any other value in this field aborts the write operation of the WPEN bit. Always reads
as 0.
Bit 0 – WPEN W
rite Protection Enable
See Register Write Protection for the list of registers which can be protected.
Value Description
0
Disables the write protection if WPKEY corresponds to 0x414443 (“ADC” in ASCII).
1
Enables the write protection if WPKEY corresponds to 0x414443 (“ADC” in ASCII).
SAM E70/S70/V70/V71 Family
Analog Front-End Controller (AFEC)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1703