Datasheet

52.7.19 AFEC Channel Data Register

Name: AFEC_CDR

Offset: 0x68

Reset: 0x00000000

Property: Read-only

Bit 31 30 29 28 27 26 25 24

Access

Reset

Bit 23 22 21 20 19 18 17 16

Access

Reset

Bit 15 14 13 12 11 10 9 8

DATA[15:8]

Access

R R R R R R R R

Reset 0 0 0 0 0 0 0 0

Bit 7 6 5 4 3 2 1 0

DATA[7:0]

Access

R R R R R R R R

Reset 0 0 0 0 0 0 0 0

Bits 15:0 – DATA[15:0] Converted Data

Returns the AFE conversion data corresponding to channel CSEL (configured in the AFEC Channel Selection

At the end of a conversion, the converted data is loaded into one of the

12 internal registers (one for each channel)

and remains in this internal register until a new conversion is completed on the same channel index. The AFEC_CDR

together with AFEC_CSELR allows to multiplex all the internal channel data registers.

The data carried on AFEC_CDR is valid only if AFEC_CHSR.CHx bit is set (where x = AFEC_CSELR.CSEL field

value).

SAM E70/S70/V70/V71 Family

Analog Front-End Controller (AFEC)

echnology Inc.

Datasheet

DS60001527D-page 1694