Datasheet

52.7.9 AFEC Last Converted Data Register
Name: AFEC_LCDR
Offset: 0x20
Reset: 0x00000000
Property: Read-only
Bit 31 30 29 28 27 26 25 24
CHNB[3:0]
Access
R R R R
Reset 0 0 0 0
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
LDATA[15:8]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
LDATA[7:0]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bits 27:24 – CHNB[3:0] Channel Number
Indicates the last converted channel when AFEC_EMR.T
AG is set. If AFEC_EMR.TAG is cleared, CHNB = 0.
Bits 15:0 – LDATA[15:0] Last Data Converted
The AFE conversion data is placed into this register at the end of a conversion and remains until a new conversion is
completed.
SAM E70/S70/V70/V71 Family
Analog Front-End Controller (AFEC)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1684