Datasheet

52.7.8 AFEC Channel Status Register
Name: AFEC_CHSR
Offset: 0x1C
Reset: 0x00000000
Property: Read-only
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
CH11 CH10 CH9 CH8
Access
R R R R
Reset 0 0 0 0
Bit 7 6 5 4 3 2 1 0
CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH0
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 – CHx Channel x Status
Value Description
0
The corresponding channel is disabled.
1
The corresponding channel is enabled.
SAM E70/S70/V70/V71 Family
Analog Front-End Controller (AFEC)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1683