Datasheet

52.7.1 AFEC Control Register
Name: AFEC_CR
Offset: 0x00
Reset: –
Property: Write-only
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
START SWRST
Access
W W
Reset – –
Bit 1 – START Start Conversion
Value Description
0
No effect.
1
Begins Analog Front-End conversion.
Bit 0 – SWRST Software Reset
Value Description
0
No effect.
1
Resets the AFEC simulating a hardware reset.
SAM E70/S70/V70/V71 Family
Analog Front-End Controller (AFEC)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1674