Datasheet

51.7.36 PWM Comparison x Value Register
Name: PWM_CMPVx
Offset: 0x0130 + x*0x10 [x=0..7]
Reset: 0x00000000
Property: Read/Write
Only the first 16 bits (channel counter size) of field CV are significant.
Bit 31 30 29 28 27 26 25 24
CVM
Access
R/W
Reset 0
Bit 23 22 21 20 19 18 17 16
CV[23:16]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
CV[15:8]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
CV[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 24 – CVM Comparison x V
alue Mode
Value Description
0
The comparison x between the counter of the channel 0 and the comparison x value is performed
when this counter is incrementing.
1
The comparison x between the counter of the channel 0 and the comparison x value is performed
when this counter is decrementing.
Note: This bit is not relevant if the counter of the channel 0 is left-aligned (CALG = 0 in PWM Channel
Mode Register)
Bits 23:0 – CV[23:0] Comparison x V
alue
Define the comparison x value to be compared with the counter of the channel 0.
SAM E70/S70/V70/V71 Family
Pulse W
idth Modulation Controller (PWM)
©
2019 Microchip Technology Inc.
Datasheet
DS60001527D-page 1635