Datasheet

51.7.33 PWM Fault Protection Value Register 2
Name: PWM_FPV2
Offset: 0xC0
Reset: 0x000F000F
Property: Read/Write
This register can only be written if bits WPSWS5 and WPHWS5 are cleared in the PWM W
rite Protection Status
Register.
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
FPZL3 FPZL2 FPZL1 FPZL0
Access
R/W R/W R/W R/W
Reset 1 1 1 1
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
FPZH3 FPZH2 FPZH1 FPZH0
Access
R/W R/W R/W R/W
Reset 1 1 1 1
Bits 16, 17, 18, 19 – FPZLx Fault Protection to Hi-Z for PWML output on channel x
Value Description
0
When fault occurs, PWML output of channel x is forced to value defined by the bit FPVLx in PWM Fault
Protection V
alue Register 1.
1
When fault occurs, PWML output of channel x is forced to high-impedance state.
Bits 0, 1, 2, 3 – FPZHx Fault Protection to Hi-Z for PWMH output on channel x
Value Description
0
When fault occurs, PWMH output of channel x is forced to value defined by the bit FPVHx in PWM
Fault Protection V
alue Register 1.
1
When fault occurs, PWMH output of channel x is forced to high-impedance state.
SAM E70/S70/V70/V71 Family
Pulse W
idth Modulation Controller (PWM)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1632