Datasheet

51.7.32 PWM Stepper Motor Mode Register
Name: PWM_SMMR
Offset: 0xB0
Reset: 0x00000000
Property: Read/Write
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
DOWN1 DOWN0
Access
Reset 0 0
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
GCEN1 GCEN0
Access
R/W R/W
Reset 0 0
Bits 16, 17 – DOWNx Down Count
Value Description
0
Up counter.
1
Down counter.
Bits 0, 1 – GCENx Gray Count Enable
Value Description
0
Disable gray count generation on PWML[2*x], PWMH[2*x], PWML[2*x +1], PWMH[2*x +1]
1
Enable gray count generation on PWML[2*x], PWMH[2*x], PWML[2*x +1], PWMH[2*x +1].
SAM E70/S70/V70/V71 Family
Pulse W
idth Modulation Controller (PWM)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1631