Datasheet

51.7.28 PWM Fault Protection Enable Register
Name: PWM_FPE
Offset: 0x6C
Reset: 0x00000000
Property: Read/Write
This register can only be written if bits WPSWS5 and WPHWS5 are cleared in the PWM W
rite Protection Status
Register.
Only the first 8 bits (number of fault input pins) of the register fields are significant.
Refer to Section 6.4 “Fault Inputs” for details on fault generation.
Bit 31 30 29 28 27 26 25 24
FPE3[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
FPE2[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
FPE1[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
FPE0[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 0:7, 8:15, 16:23, 24:31 – FPEx Fault Protection Enable for channel x
For each bit y of FPEx, where y is the fault input number:
0: Fault y is not used for the fault protection of channel x.
1: Fault y is used for the fault protection of channel x.
CAUTION
To prevent an unexpected activation of the fault protection, the bit y of FPEx field can be set to ‘1’ only if
the corresponding FPOL field has been previously configured to its final value in PWM Fault Mode
Register.
SAM E70/S70/V70/V71 Family
Pulse W
idth Modulation Controller (PWM)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1627