Datasheet

51.7.22 PWM Output Selection Set Update Register
Name: PWM_OSSUPD
Offset: 0x54
Reset: –
Property: Write-only
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
OSSUPL3 OSSUPL2 OSSUPL1 OSSUPL0
Access
W W W W
Reset 0 0 0 –
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
OSSUPH3 OSSUPH2 OSSUPH1 OSSUPH0
Access
W W W W
Reset 0 0 0 –
Bits 16, 17, 18, 19 – OSSUPLx Output Selection Set for PWML output of the channel x
Value Description
0
No effect.
1
Output override value OOVLx selected as PWML output of channel x at the beginning of the next
channel x PWM period.
Bits 0, 1, 2, 3 – OSSUPHx Output Selection Set for PWMH output of the channel x
Value Description
0
No effect.
1
Output override value OOVHx selected as PWMH output of channel x at the beginning of the next
channel x PWM period.
SAM E70/S70/V70/V71 Family
Pulse W
idth Modulation Controller (PWM)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1621