Datasheet

Note:
1.
The update occurs at the beginning of the next PWM period, when the UPDULOCK bit in PWM Sync
Channels Update Control Register is set.
2. The update occurs when the Update Period is elapsed.
Bits 0, 1, 2, 3 – SYNCx Synchronous Channel x
Value Description
0
Channel x is not a synchronous channel.
1
Channel x is a synchronous channel.
SAM E70/S70/V70/V71 Family
Pulse W
idth Modulation Controller (PWM)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1608