Datasheet
Figure 50-6. Capture Mode
TIMER_CLOCK1
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
XC0
XC1
XC2
TCCLKS
CLKI
Q S
R
S
R
Q
CLKSTA CLKEN CLKDIS
BURST
TIOB
Register C
Capture
Register A
Capture
Register B
Compare RC =
Counter
ABETRG
SWTRG
ETRGEDG
CPCTRG
TC1_IMR
Trig
LDRBS
LDRAS
ETRGS
TC1_SR
LOVRS
COVFS
SYNC
1
MTIOB
TIOA
MTIOA
LDRA
LDBSTOP
If RA is not loaded
or RB is loaded
If RA is loaded
LDBDIS
CPCS
INT
Edge
Detector
Edge
Detector
LDRB
Edge
Detector
CLK
OVF
RESET
Timer Counter Channel
Peripheral Clock
Synchronous
Edge Detection
Edge Subsampler
SBSMPLR
50.6.11 Waveform Mode
Waveform mode is entered by setting the TC_CMRx.WAVE bit.
In W
aveform mode, the TC channel generates one or two PWM signals with the same frequency and independently
programmable duty cycles, or generates different types of one-shot or repetitive pulses.
In this mode, TIOAx is configured as an output and TIOBx is defined as an output if it is not used as an external event
(EEVT parameter in TC_CMR).
Waveform Mode shows the configuration of the TC channel when programmed in Waveform operating mode.
50.6.12 Waveform Selection
Depending on the WAVSEL parameter in TC_CMR, the behavior of TC_CV varies.
With any selection, TC_RA, TC_RB and TC_RC can all be used as compare registers.
RA Compare is used to control the TIOAx output, RB Compare is used to control the TIOBx output (if correctly
configured) and RC Compare is used to control TIOAx and/or TIOBx outputs.
SAM E70/S70/V70/V71 Family
T
imer Counter (TC)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1498