Datasheet

• F1 Bits 28:0 EFID2[28:0]: Extended Filter ID 2
This field has a dif
ferent meaning depending on the configuration of EFEC:
• EFEC = “001”...“110”–Second ID of extended ID filter element
• EFEC = “111”–Filter for Rx Buffers or for debug messages
EFID2[10:9] decides whether the received message is stored into an Rx Buffer or treated as message A, B, or C of
the debug message sequence.
0: Store message in an Rx buffer
1: Debug Message A
2: Debug Message B
3: Debug Message C
EFID2[5:0] defines the index of the dedicated Rx Buffer element to which a matching message is stored.
49.5.8 Hardware Reset Description
After hardware reset, the registers of the MCAN hold the reset values listed in the register descriptions. Additionally
the Bus_Off state is reset and the output CANTX is set to recessive (HIGH). The value 0x0001 (MCAN_CCCR.INIT =
‘1’) in the CC Control register enables software initialization. The MCAN does not influence the CAN bus until the
processor resets MCAN_CCCR.INIT to ‘0’.
49.5.9 Access to Reserved Register Addresses
In case the application software accesses one of the reserved addresses in the MCAN register map (read or write
access), interrupt flag MCAN_IR.ARA is set and, if enabled, the selected interrupt line is risen.
SAM E70/S70/V70/V71 Family
Controller Area Network (MCAN)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1430