Datasheet

48.7.13 HBI Channel Busy 0 Register
Name: MLB_HCBR0
Offset: 0x098
Reset: 0x00000000
Property: Read-only
The HC can determine which channel(s) are busy by reading the HBI Channel Busy Registers (HCBRn). An HBI
channel is busy if:
• it is currently loaded into one of the two AGUs
• the channel is enabled, CE = 1 from the Channel Allocation T
able (CTR Address Mapping), and
• the DMA is active
When an HBI channel is busy, hardware may write back its local copy of the channel descriptor at any time. System
software should not write a CDT descriptor for a channel that is busy. Only two HBI channels can be busy at any
given time. Each bit of HCBRn is read-only.
Bit 31 30 29 28 27 26 25 24
CHB: Bitwise Channel Busy Bit [31[31:24]
Access
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
CHB: Bitwise Channel Busy Bit [31[23:16]
Access
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
CHB: Bitwise Channel Busy Bit [31[15:8]
Access
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
CHB: Bitwise Channel Busy Bit [31[7:0]
Access
Reset 0 0 0 0 0 0 0 0
Bits 31:0 – CHB: Bitwise Channel Busy Bit [31[31:0] 0]
CHB[n] = 1 indicates that channel n is busy
.
SAM E70/S70/V70/V71 Family
Media Local Bus (MLB)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1387