Datasheet

47. Universal Asynchronous Receiver Transmitter (UART)
47.1 Description
The Universal Asynchronous Receiver Transmitter (UART) features a two-pin UART that can be used for
communication and trace purposes and of
fers an ideal medium for in-situ programming solutions.
Moreover, the association with a DMA controller permits packet handling for these tasks with processor time reduced
to a minimum.
47.2 Embedded Characteristics
• Two-pin UART
–
Independent Receiver and Transmitter with a Common Programmable Baud Rate Generator
– Baud Rate can be Driven by Processor-Independent Source Clock
– Even, Odd, Mark or Space Parity Generation
– Parity, Framing and Overrun Error Detection
– Automatic Echo, Local Loopback and Remote Loopback Channel Modes
– Digital Filter on Receive Line
– Interrupt Generation
– Support for Two DMA Channels with Connection to Receiver and Transmitter
– Supports Asynchronous Partial Wake-up on Receive Line Activity (SleepWalking)
– Comparison Function on Received Character
– Register Write Protection
47.3 Block Diagram
Figure 47-1. UART Block Diagram
DMA Controller
Baud Rate
Generator
Transmit
Receive
Interrupt
Control
Parallel
Input/
Output
UTXD
U
RXD
uart_irq
APB
bus clock
Bridge
peripheral clock
PMC
UART
PCKx
Table 47-1. UART Pin Description
Pin Name Description Type
URXD UART Receive Data Input
UTXD UART Trasnmit Data Output
SAM E70/S70/V70/V71 Family
Universal Asynchronous Receiver T
ransmitter (UART)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1302