Datasheet

46.7.38 USART LON L2HDR Register
Name: US_LONL2HDR
Offset: 0x006C
Reset: 0x0
Property: Read/Write
This register is relevant only if USART_MODE = 0x9 in the USAR
T Mode Register.
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
Access
Reset
Bit 15 14 13 12 11 10 9 8
Access
Reset
Bit 7 6 5 4 3 2 1 0
PB ALTP BLI[5:0]
Access
Reset 0 0 0 0 0 0 0 0
Bit 7 – PB LON Priority Bit
Value Description
0
LON priority bit reset.
1
LON priority bit set.
Bit 6 – ALTP LON Alternate Path Bit
Value Description
0
LON alternate path bit reset.
1
LON alternate path bit set.
Bits 5:0 – BLI[5:0] LON Backlog Increment
Value Description
0–63
LON backlog increment to be generated as a result of delivering the LON frame.
SAM E70/S70/V70/V71 Family
Universal Synchronous Asynchronous Receiver T
ransc...
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echnology Inc.
Datasheet
DS60001527D-page 1292